With recent enhancements in the speed and performance of semiconductor integrated circuit devices (IC chips) used in microprocessors of computers and the like, the number of terminals tends to increase and the distance or pitch between terminals tends to decrease accordingly. In general, a plurality of terminals is densely arranged in an array on the bottom surface of an IC chip and the terminal group is connected to the terminal group of a motherboard in a flip chip manner. However, since the terminal group of the IC chip and the terminal group of the motherboard are substantially different to each other with respect to the pitch between the terminals, a method for manufacturing a package in which the IC chip is mounted on an IC chip mounting circuit board and the package is mounted on the motherboard is employed. In a wiring board constituting such a package, it is proposed to employ a built-in capacitor in order to reduce the switching noise of the IC chip or the like. As an example of such a wiring board, a wiring board in which a capacitor is accommodated in an accommodation hole of a core board made of polymer material, and a buildup layer is formed on top and rear surfaces of the core board is disclosed in Japanese Patent Application Laid-Open (kokai) No. 2006-351782 (see FIG. 1 etc.).
An example of the method for manufacturing the above-mentioned conventional wiring board will be described below. First, a core board 204 made of a polymer material is prepared. The core board 204 has an accommodation hole 203 opened at both core main surface 201 and a core rear surface 202 (refer to FIG. 23). Also, a capacitor 208 (refer to FIG. 23) having a plurality of surface electrodes 207 formed on a capacitor main surface 205 and a capacitor rear surface 206, respectively, is prepared. Next, a taping step for sticking an adhesive tape 209 on the core rear surface 202 is performed so as to seal an opening of the accommodation hole 203 at the core rear surface 202 side. Thereafter, an accommodation step for accommodating the capacitor 208 in the accommodation hole 203 is performed. As a result, the capacitor 208 is temporarily fixed in the accommodation hole 203 with the capacitor rear surface 206 being stuck on the adhesive face of the adhesive tape 209 (refer to FIG. 23).
Next, a resin insulating layer 210 made of a polymer material is formed on the core main surface 201 and the capacitor main surface 205 (refer to FIG. 24). Also, a part of the resin insulating layer 210 is used to fill a gap between an inner wall face of the accommodation hole 203 and a side face of the capacitor 208 to thereby fix the capacitor 208 (refer to FIG. 24). At this time, the adhesive tape 209 is peeled from the capacitor rear surface 206. Next, a resin insulating layer 211 made of a polymer material is formed on the core rear surface 202 and the capacitor rear surface 206 (refer to FIG. 25). Further, a laser boring step is performed to form a plurality of via holes, which penetrate the resin insulating layers 210, 211, in the predetermined positions to thereby expose the surface electrodes 207. After applying electroless copper plating to the resin insulating layers 210, 211 and to the inside of via holes, etching resist is formed thereon, and subsequently electrolytic copper plating is performed. Furthermore, etching resist is removed and soft etching is performed. As a result, a conductor layer 213 is pattern-formed on the resin insulating layers 210, 211, while a via conductor 212 is formed inside of each via hole (refer to FIG. 25).
Thereafter, a buildup layer is formed by alternately laminating a resin insulating layer and a conductor layer on the resin insulating layers 210, 211. As a result, a desired wiring board is produced.